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Silicon-van der Waals heterointegration for CMOS-compatible logic-in-memory design.
Lee MP, Gao C, Tsai MY, Lin CY, Yang FS, Sung HY, Zhang C, Li W, Li J, Zhang J, Watanabe K, Taniguchi T, Ueno K, Tsukagoshi K, Ho CH, Chu J, Chiu PW, Li M, Wu WW, Lin YF. Lee MP, et al. Among authors: tsai my. Sci Adv. 2023 Dec 8;9(49):eadk1597. doi: 10.1126/sciadv.adk1597. Epub 2023 Dec 8. Sci Adv. 2023. PMID: 38064557 Free PMC article.
Diffused Beam Energy to Dope van der Waals Electronics and Boost Their Contact Barrier Lowering.
Lin CY, Lee MP, Chang YM, Tseng YT, Yang FS, Li M, Chen JY, Chen CF, Tsai MY, Lin YC, Ueno K, Yamamoto M, Lo ST, Lien CH, Chiu PW, Tsukagoshi K, Wu WW, Lin YF. Lin CY, et al. Among authors: tsai my. ACS Appl Mater Interfaces. 2022 Sep 14;14(36):41156-41164. doi: 10.1021/acsami.2c07679. Epub 2022 Aug 29. ACS Appl Mater Interfaces. 2022. PMID: 36037311
WSe2/WS2 Heterobilayer Nonvolatile Memory Device with Boosted Charge Retention.
Siao MD, Gandhi AC, Sahoo AK, Wu YC, Syu HK, Tsai MY, Tsai TH, Yang YC, Lin YF, Liu RS, Chiu PW. Siao MD, et al. Among authors: tsai my, tsai th. ACS Appl Mater Interfaces. 2022 Jan 19;14(2):3467-3475. doi: 10.1021/acsami.1c20076. Epub 2022 Jan 7. ACS Appl Mater Interfaces. 2022. PMID: 34995438
802 results