Reduction of random telegraph noise by high-pressure deuterium annealing for p-type omega-gate nanowire FET

In this work, we studied the effect of high-pressure deuterium annealing (HPDA) on a p-type omega-gate nanowire field effect transistor by random telegraph noise (RTN) signal analysis. After HPDA under conditions of 400 °C and 10 atm for 30 min, I_OFF decreases by 41.2% and I_ON increases by up to 5.4%. Also, subthreshold swing (SS) is reduced from 72 mV dec^-1 to 70 mV dec^-1. In RTN analysis, multi-level RTN is reduced to single-level RTN due to the passivation of a fast trap site by HPDA. ΔI_D/I_D is also decreased 1.3 and 1.1 times at |V_OV| = 0.2 V and 0.4 V, respectively. From the low-frequency noise analysis, the reduction of trap density is observed by 86% at |V_OV| = 0.4 V after HPDA. Through these results, we found that the HPDA reduces traps of gate dielectric and improves the quality of the interface between gate dielectric and NW channel in p-type OGNW FET.