This paper concerns the design and implementation of a fully integrated low noise and high CMRR rail-to-rail preamplifier dedicated to EEG acquisition channel. The preamplification technique is based on two complementary CMOS True Logarithmic Amplifier (TLA) stages connected in parallel. The TLA largely amplifies small amplitude of EEG signals, and moderately the large amplitude ones created during epileptic. A chopper stabilization technique is used to filter the 1/ƒ noise and the DC offset voltage of the input CMOS transistors and to increase the common-mode rejection ratio (CMRR). Due to the TLA structure, a high CMRR and high power supply rejection ratio are achieved and the signal-to-noise ratio (of the channel is better enhanced). To snugly fit the ADC input window to the EEG signal magnitude a new programming gain approach is implemented. Also, a chopper spike filter is used to cancel the spike voltages generated by the charge injections of modulator/demodulator switches. The proposed preamplifier is implemented in 0.18 µm CMOS technology. Post-layout simulation results exhibit 253 dB @50/60 Hz as CMRR, 500 nVrms @100 Hz as input-referred noise while consuming 55 µA from a 1.8 V supply.