In the last decade, the silicon nanocrystal memory technology has received widespread interests from the scientific community working in the field of non-volatile solid-state memories, considering it as a feasible candidate for the post-Flash scenario. The immunity to stress-induced leakage current and the reduction of parasitic floating-gate capacitive couplings make the nanocrystal technology very attractive, especially when considering the CMOS compatible process flow. However, many open issues still exist for its development, first of all concerning its scaling perspectives. Starting from the discussion of the basic principles of nanocrystal storage, in this paper we review the major benefits and the open challenges of the silicon nanocrystal memory technology.