Developing low-power FETs holds significant importance in advancing logic circuits, especially as the feature size of MOSFETs approaches sub-10 nanometers. However, this has been restricted by the thermionic limitation of SS, which is limited to 60 mV per decade at room temperature. Herein, we proposed a strategy that utilizes 2D semiconductors with an isolated-band feature as channels to realize sub-thermionic SS in MOSFETs. Through high-throughput calculations, we established a guiding principle that combines the atomic structure and orbital interaction to identify their sub-thermionic transport potential. This guides us to screen 192 candidates from the 2D material database comprising 1608 systems. Additionally, the physical relationship between the sub-thermionic transport performances and electronic structures is further revealed, which enables us to predict 15 systems with promising device performances for low-power applications with supply voltage below 0.5 V. This work opens a new way for the low-power electronics based on 2D materials and would inspire extensive interests in the experimental exploration of intrinsic steep-slope MOSFETs.
Keywords: 2D materials; DFT-NEGF calculations; Electronic band structures; Steep-slope transistors; Transport properties.
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