Record high room temperature resistance switching in ferroelectric-gated Mott transistors unlocked by interfacial charge engineering

Nat Commun. 2023 Dec 12;14(1):8247. doi: 10.1038/s41467-023-44036-x.

Abstract

The superior size and power scaling potential of ferroelectric-gated Mott transistors makes them promising building blocks for developing energy-efficient memory and logic applications in the post-Moore's Law era. The close to metallic carrier density in the Mott channel, however, imposes the bottleneck for achieving substantial field effect modulation via a solid-state gate. Previous studies have focused on optimizing the thickness, charge mobility, and carrier density of single-layer correlated channels, which have only led to moderate resistance switching at room temperature. Here, we report a record high nonvolatile resistance switching ratio of 38,440% at 300 K in a prototype Mott transistor consisting of a ferroelectric PbZr0.2Ti0.8O3 gate and an RNiO3 (R: rare earth)/La0.67Sr0.33MnO3 composite channel. The ultrathin La0.67Sr0.33MnO3 buffer layer not only tailors the carrier density profile in RNiO3 through interfacial charge transfer, as corroborated by first-principles calculations, but also provides an extended screening layer that reduces the depolarization effect in the ferroelectric gate. Our study points to an effective material strategy for the functional design of complex oxide heterointerfaces that harnesses the competing roles of charge in field effect screening and ferroelectric depolarization effects.