Analog storage through synaptic weights using conductance in resistive neuromorphic systems and devices inevitably generates harmful heat dissipation. This thermal issue not only limits the energy efficiency but also hampers the very-large-scale and highly complicated hardware integration as in the human brain. Here we demonstrate that the synaptic weights can be simulated by reconfigurable non-volatile capacitances of a ferroelectric-based memcapacitor with ultralow-power consumption. The as-designed metal/ferroelectric/metal/insulator/semiconductor memcapacitor shows distinct 3-bit capacitance states controlled by the ferroelectric domain dynamics. These robust memcapacitive states exhibit uniform maintenance of more than 104 s and well endurance of 109 cycles. In a wired memcapacitor crossbar network hardware, analog vector-matrix multiplication is successfully implemented to classify 9-pixel images by collecting the sum of displacement currents (I = C × dV/dt) in each column, which intrinsically consumes zero energy in memcapacitors themselves. Our work sheds light on an ultralow-power neural hardware based on ferroelectric memcapacitors.
Keywords: P(VDF‐TrFE); ferroelectric; in‐memory computing; memcapacitor; ultralow power.
© 2023 The Authors. Exploration published by Henan University and John Wiley & Sons Australia, Ltd.