A Size, Weight, Power, and Cost-Efficient 32-Channel Time to Digital Converter Using a Novel Wave Union Method

Saleh M Alshahry; Awwad H Alshehry; Abdullah K Alhazmi; Vamsy P Chodavarapu

doi:10.3390/s23146621

A Size, Weight, Power, and Cost-Efficient 32-Channel Time to Digital Converter Using a Novel Wave Union Method

Sensors (Basel). 2023 Jul 23;23(14):6621. doi: 10.3390/s23146621.

Authors

Saleh M Alshahry¹, Awwad H Alshehry¹, Abdullah K Alhazmi¹, Vamsy P Chodavarapu¹

Affiliation

¹ Department of Electrical and Computer Engineering, University of Dayton, 300 College Park, Dayton, OH 45469, USA.

Abstract

We present a Tapped Delay Line (TDL)-based Time to Digital Converter (TDC) using Wave Union type A (WU-A) architecture for applications that require high-precision time interval measurements with low size, weight, power, and cost (SWaP-C) requirements. The proposed TDC is implemented on a low-cost Field-Programmable Gate Array (FPGA), Artix-7, from Xilinx. Compared to prior works, our high-precision multi-channel TDC has the lowest SWaP-C requirements. We demonstrate an average time precision of less than 3 ps and a Root Mean Square resolution of about 1.81 ps. We propose a novel Wave Union type A architecture where only the first multiplexer is used to generate the wave union pulse train at the arrival of the start signal to minimize the required computational processing. In addition, an auto-calibration algorithm is proposed to help improve the TDC performance by improving the TDC Differential Non-Linearity and Integral Non-Linearity.

Keywords: field programmable gate array (FPGA); tapped delay line (TDL); time to digital converter (TDC); wave union.

Grants and funding

We would like to acknowledge the financial support received from the Technical and Vocational Training Corporation (TVTC) in Riyadh, Saudi Arabia, and the School of Engineering at the University of Dayton.