CMOS neural interfaces are aimed at studying the electrical activity of neurons and may help to restore lost functions of the nervous system in the future. The central function of most neural interfaces is the detection of extracellular electrical potentials by means of numerous microelectrodes positioned in close vicinity to the neurons. Modern neural interfaces require compact low-power, low-noise readout circuits, capable of recording from thousands of electrodes simultaneously without excessive area consumption and heat dissipation. In this article, we propose a novel readout technique for neural interfaces. The readout is based on a voltage-controlled oscillator (VCO), the frequency of which is modulated by the input voltage. The novelty of this work lies in the postprocessing of the VCO output, which is based on generating digital timestamps that contain temporal information about the oscillation. This method is potentially advantageous, because it requires mostly digital circuitry, which is more scalable than analog circuitry. Furthermore, most of the digital circuitry required for VCO-timestamping can be shared among several VCOs, rendering the architecture efficient for multi-channel architectures. This article introduces the VCO-timestamping concept, including theoretical derivations and simulations, and presents measurements of a prototype fabricated in 0.18-μm CMOS technology. The measured input-referred noise in the 300 Hz-5 kHz band was 5.7 μVrms, and the prototype was able to detect pre-recorded extracellular action potentials.