Studies of Performance of Cs2TiI6-XBrX (Where x = 0 to 6)-Based Mixed Halide Perovskite Solar Cell with CdS Electron Transport Layer

Kunal Chakraborty; Nageswara Rao Medikondu; Kumutha Duraisamy; Naglaa F Soliman; Walid El-Shafai; Sunil Lavadiya; Samrat Paul; Sudipta Das

doi:10.3390/mi14020447

Studies of Performance of Cs₂TiI_6-XBr_X (Where x = 0 to 6)-Based Mixed Halide Perovskite Solar Cell with CdS Electron Transport Layer

Micromachines (Basel). 2023 Feb 14;14(2):447. doi: 10.3390/mi14020447.

Authors

Kunal Chakraborty¹, Nageswara Rao Medikondu², Kumutha Duraisamy³, Naglaa F Soliman⁴, Walid El-Shafai^{5

6}, Sunil Lavadiya⁷, Samrat Paul¹, Sudipta Das⁸

Affiliations

¹ Advanced Materials Research and Energy Application Laboratory, Department of Energy Engineering, North-Eastern Hill University, Shillong 793022, India.
² Department of Mechanical Engineering, Koneru Lakshmaiah Education Foundation, Vaddeswaram 522302, India.
³ Department of Biomedical Engineering, KarpagaVinayaga College of Engineering and Technology, Chengalpattu 603308, India.
⁴ Department of Information Technology, College of Computer and Information Sciences, Princess Nourah Bint Abdulrahman University, P.O. Box 84428, Riyadh 11671, Saudi Arabia.
⁵ Security Engineering Lab, Computer Science Department, Prince Sultan University, Riyadh 11586, Saudi Arabia.
⁶ Department of Electronics and Electrical Communications Engineering, Faculty of Electronic Engineering, Menoufia University, Menouf 32952, Egypt.
⁷ Department of Information and Communication Technology, Marwadi University, Rajkot 360003, India.
⁸ Department of Electronics & Communication Engineering, IMPS College of Engineering and Technology, Malda 732103, India.

Abstract

The present research work represents the numerical study of the device performance of a lead-free Cs₂TiI_6-XBr_X-based mixed halide perovskite solar cell (PSC), where x = 1 to 5. The open circuit voltage (V_OC) and short circuit current (J_SC) in a generic TCO/electron transport layer (ETL)/absorbing layer/hole transfer layer (HTL) structure are the key parameters for analyzing the device performance. The entire simulation was conducted by a SCAPS-1D (solar cell capacitance simulator- one dimensional) simulator. An alternative FTO/CdS/Cs₂TiI_6-XBr_X/CuSCN/Ag solar cell architecture has been used and resulted in an optimized absorbing layer thickness at 0.5 µm thickness for the Cs₂TiBr₆, Cs₂TiI₁Br₅, Cs₂TiI₂Br₄, Cs₂TiI₃Br₃ and Cs₂TiI₄Br₂ absorbing materials and at 1.0 µm and 0.4 µm thickness for the Cs₂TiI₅Br₁ and Cs₂TiI₆ absorbing materials. The device temperature was optimized at 40 °C for the Cs₂TiBr₆, Cs₂TiI₁Br₅ and Cs₂TiI₂Br₄ absorbing layers and at 20 °C for the Cs₂TiI₃Br₃, Cs₂TiI₄Br₂, Cs₂TiI₅Br₁ and Cs₂TiI₆ absorbing layers. The defect density was optimized at 10¹⁰ (cm^-3) for all the active layers.

Keywords: diffusion; efficiency; perovskite; solar cell.

Grants and funding

PNURSP2023R66/Princess Nourah bint Abdulrahman University