The measurements of wafers' surface profile are crucial for safeguarding the fabrication quality of integrated circuits and MEMS devices. The current techniques measure the profile mainly by moving a capacitive or optical spacing sensing probe along multiple lines, which is high-cost and inefficient. This paper presents the calculation, simulation and experiment of a method for measuring the surface profile with arrayed capacitive spacing transducers. The calculation agreed well with the simulation and experiment. Finally, the proposed method was utilized for measuring the profile of a silicon wafer. The result is consistent with that measured by a commercial instrument. As a movement system is not required, the proposed method is promising for industry applications with superior cost and efficiency to the existing technology.
Keywords: capacitive transducer; multi-grid; surface profile; wafer warpage.