This paper investigates an auxiliary management and control channel (AMCC) signal extraction method using digital signal processing (DSP) blocks with 3-step moving averaging that allows a single coherent receiver to receive main signal and AMCC signal simultaneously. Receiver sensitivity characteristics versus the modulation index (MI) and average number of the proposed DSP blocks are elucidated. Based on the results, we discuss a policy for designing the parameters. Experiments apply the design policy to achieve receiver sensitivity of -41.8 dBm with both 25 Gbit/s QPSK main signal and 128 kbit/s AMCC signal; the main signal sensitivity penalty is just 0.2 dB.