Compact Integration of Hydrogen-Resistant a-InGaZnO and Poly-Si Thin-Film Transistors

Micromachines (Basel). 2022 May 27;13(6):839. doi: 10.3390/mi13060839.

Abstract

The low-temperature poly-Si oxide (LTPO) backplane is realized by monolithically integrating low-temperature poly-Si (LTPS) and amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) in the same display backplane. The LTPO-enabled dynamic refreshing rate can significantly reduce the display's power consumption. However, the essential hydrogenation of LTPS would seriously deteriorate AOS TFTs by increasing the population of channel defects and carriers. Hydrogen (H) diffusion barriers were comparatively investigated to reduce the H content in amorphous indium-gallium-zinc oxide (a-IGZO). Moreover, the intrinsic H-resistance of a-IGZO was impressively enhanced by plasma treatments, such as fluorine and nitrous oxide. Enabled by the suppressed H conflict, a novel AOS/LTPS integration structure was tested by directly stacking the H-resistant a-IGZO on poly-Si TFT, dubbed metal-oxide-on-Si (MOOS). The noticeably shrunken layout footprint could support much higher resolution and pixel density for next-generation displays, especially AR and VR displays. Compared to the conventional LTPO circuits, the more compact MOOS circuits exhibited similar characteristics.

Keywords: amorphous indium–gallium–zinc oxide (a–IGZO); diffusion barrier; fluorination; hydrogen–resistant; low–temperature poly–Si oxide (LTPO); metal–oxide–on–Si (MOOS); nitrous oxide (N2O); thin–film transistors (TFT).

Grants and funding

This research was funded by Shenzhen Research Programs grant number JCYJ20190808154803565, JCYJ20200109140601691, SGDX20190918105001787, SGDX20201103095607022, SGDX20201103095610029 and GXWD20201231165807007–20200807025846001.