Feature sizes in integrated circuits have decreased substantially over time, and it has become increasingly difficult to three-dimensionally image these complex circuits after fabrication. This can be important for process development, defect analysis, and detection of unexpected structures in externally sourced chips, among other applications. Here, we report on a non-destructive, tabletop approach that addresses this imaging problem through x-ray tomography, which we uniquely realize with an instrument that combines a scanning electron microscope (SEM) with a transition-edge sensor (TES) x-ray spectrometer. Our approach uses the highly focused SEM electron beam to generate a small x-ray generation region in a carefully designed target layer that is placed over the sample being tested. With the high collection efficiency and resolving power of a TES spectrometer, we can isolate x-rays generated in the target from background and trace their paths through regions of interest in the sample layers, providing information about the various materials along the x-ray paths through their attenuation functions. We have recently demonstrated our approach using a 240 Mo/Cu bilayer TES prototype instrument on a simplified test sample containing features with sizes of ∼ 1 μm. Currently, we are designing and building a 3000 Mo/Au bilayer TES spectrometer upgrade, which is expected to improve the imaging speed by factor of up to 60 through a combination of increased detector number and detector speed.
Keywords: Computed tomography; integrated circuit measurements; scanning electron microscopy; transition-edge sensors.