Layered Graphene Growth Directly on Sapphire Substrates for Applications

Che-Jia Chang; Po-Cheng Tsai; Wei-Ya Su; Chun-Yuan Huang; Po-Tsung Lee; Shih-Yen Lin

doi:10.1021/acsomega.2c00554

Layered Graphene Growth Directly on Sapphire Substrates for Applications

ACS Omega. 2022 Apr 4;7(15):13128-13133. doi: 10.1021/acsomega.2c00554. eCollection 2022 Apr 19.

Authors

Che-Jia Chang^{1

2}, Po-Cheng Tsai^{2

3}, Wei-Ya Su⁴, Chun-Yuan Huang⁴, Po-Tsung Lee¹, Shih-Yen Lin^{2

3

4}

Affiliations

¹ Department of Photonics, National Yang Ming Chiao Tung University, No. 1001, Daxue Road, Hsinchu City 300093, Taiwan.
² Research Center for Applied Sciences, Academia Sinica, No. 128, Sec. 2, Academia Road, Taipei 11529, Taiwan.
³ Graduate Institute of Electronics Engineering, National Taiwan University, No.1, Sec. 4, Roosevelt Road, Taipei 10617, Taiwan.
⁴ Department of Applied Science, National Taitung University, 369, Sec. 2, University Road, Taitung 950, Taiwan.

Abstract

Layer-by-layer graphene growth is demonstrated by repeating CVD growth cycles directly on sapphire substrates. Improved field-effect mobility values are observed for the bottom-gate transistors fabricated by using the bilayer graphene channel, which indicates an improved crystallinity is obtained after the second CVD growth cycle. Despite the poor wettability of copper on graphene surfaces, graphene may act as a thin and effective diffusion barrier for copper atoms. The low resistivity values of thin copper films deposited on thin monolayer MoS₂/monolayer graphene heterostructures have demonstrated its potential to replace current thick liner/barrier stacks in back-end interconnects. The unique van der Waals epitaxy growth mode will be helpful for both homo- and heteroepitaxy on 2D material surfaces.