Quantum device designing (QDD) for future semiconductor engineering

J D John; S Nishimoto; N Kadowaki; I Saito; K Okano; S Okano; D R T Zahn; T Masuzawa; T Yamada; D H C Chua; T Ito

doi:10.1063/5.0081544

Quantum device designing (QDD) for future semiconductor engineering

Rev Sci Instrum. 2022 Mar 1;93(3):034703. doi: 10.1063/5.0081544.

Authors

J D John¹, S Nishimoto¹, N Kadowaki¹, I Saito¹, K Okano¹, S Okano², D R T Zahn², T Masuzawa³, T Yamada⁴, D H C Chua⁵, T Ito⁶

Affiliations

¹ Department of Physics, International Christian University, 3-10-2 Osawa, Mitaka, Tokyo 181-8585, Japan.
² Semiconductor Physics, Chemnitz University of Technology, D-09107 Chemnitz, Germany.
³ Research Institute of Electronics, Shizuoka University, 3-5-1 Johoku, Naka-ku, Hamamatsu 432-8011, Japan.
⁴ Nanomaterials Research Institute, National Institute of Advanced Industrial Science and Technology, 1-1-1 Higashi, Tsukuba 305-8565, Japan.
⁵ Department of Material Science and Engineering, National University of Singapore, 9 Engineering Drive, Singapore 119077.
⁶ Eiwa Bussan Company Limited, 2-9-14 Uchikanda, Chiyoda-ku, Tokyo, Japan.

PMID: 35365006
DOI: 10.1063/5.0081544

Abstract

In semiconductor device history, a trend is observed where narrowing and increasing the number of material layers improve device functionality, with diodes, transistors, thyristors, and superlattices following this trend. While superlattices promise unique functionality, they are not widely adopted due to a technology barrier, requiring advanced fabrication, such as molecular beam epitaxy and lattice-matched materials. Here, a method to design quantum devices using amorphous materials and physical vapor deposition is presented. It is shown that the multiplication gain M depends on the number of layers of the superlattice, N, as M = kN, with k as a factor indicating the efficiency of multiplication. This M is, however, a trade-off with transit time, which also depends on N. To demonstrate, photodetector devices are fabricated on Si, with the superlattice of Se and As₂Se₃, and characterized using current-voltage (I-V) and current-time (I-T) measurements. For superlattices with the total layer thicknesses of 200 nm and 2 μm, the results show that k_200nm = 0.916 and k_2μm = 0.384, respectively. The results confirm that the multiplication factor is related to the number of superlattice layers, showing the effectiveness of the design approach.