Device performances analysis of p-type doped silicene-based field effect transistor using SPICE-compatible model

PLoS One. 2022 Mar 3;17(3):e0264483. doi: 10.1371/journal.pone.0264483. eCollection 2022.

Abstract

Moore's Law is approaching its end as transistors are scaled down to tens or few atoms per device, researchers are actively seeking for alternative approaches to leverage more-than-Moore nanoelectronics. Substituting the channel material of a field-effect transistors (FET) with silicene is foreseen as a viable approach for future transistor applications. In this study, we proposed a SPICE-compatible model for p-type (Aluminium) uniformly doped silicene FET for digital switching applications. The performance of the proposed device is benchmarked with various low-dimensional FETs in terms of their on-to-off current ratio, subthreshold swing and drain-induced barrier lowering. The results show that the proposed p-type silicene FET is comparable to most of the selected low-dimensional FET models. With its decent performance, the proposed SPICE-compatible model should be extended to the circuit-level simulation and beyond in future work.

Publication types

  • Research Support, Non-U.S. Gov't

MeSH terms

  • Computer Simulation
  • Transistors, Electronic*

Grants and funding

1.) Michael Tan Loong Peng - Ministry of Higher Education (MOHE) of Malaysia through the Fundamental Research Grant Scheme (FRGS/1/2021/STG07/UTM/02/3); The funders had no role in study design, data collection and analysis, decision to publish, or preparation of the manuscript. 2.) Munawar Agus Riyadi - World Class Research Universitas Diponegoro (WCRU) 2021 Grant no. 118-16/UN7.6.1/PP/2021; The funders had no role in study design, data collection and analysis, decision to publish, or preparation of the manuscript.