Wireless sensor network (WSN) applications are under extensive research and development due to the need to interconnect devices with each other. To reduce latency while keeping very low power consumption, the implementation of a wake-up receiver (WuR) is of particular interest. In WuR implementations, meeting high performance metrics is a design challenge, and the obtention of high-sensitivity, high data rate, low-power-consumption WuRs is not a straightforward procedure. The focus of our proposals is centered on power consumption and area reduction to provide high integrability and maintain a low cost-per-node, while we simultaneously improve circuit sensitivity. Firstly, we present a two-stage design based on a feedback technique and improve the area use, power consumption and sensitivity of the circuit by adding a current-reuse approach. The first solution is composed of a feedback amplifier, two op-amps plus a low-pass filter. The circuit achieves a sensitivity of -63.2 dBm with a power consumption of 6.77 µA and an area as low as 398 × 266 µm2. With the current-reuse feedback amplifier, the power consumption is halved in the second circuit (resulting in 3.63 µA), and the resulting circuit area is as low as 262 × 262 µm2. Thanks to the nature of the circuit, the sensitivity is improved to -75 dBm. This latter proposal is particularly suitable in applications where a fully integrated WuR is desired, providing a reasonable sensitivity with a low power consumption and a very low die footprint, therefore facilitating integration with other components of the WSN node. A thorough discussion of the most relevant state-of-the-art solutions is presented, too, and the two developed solutions are compared to the most relevant contributions available in the literature.
Keywords: complementary metal-oxide semiconductor; energy efficient; low power; radiofrequency envelope detector; tuned radiofrequency; wake-up receiver; wireless sensor network.