Photoelectric Logic and In Situ Memory Transistors with Stepped Floating Gates of Perovskite Quantum Dots

ACS Nano. 2022 Feb 22;16(2):2442-2451. doi: 10.1021/acsnano.1c08945. Epub 2022 Jan 28.

Abstract

Electronic-Photonic integrated systems have attracted intensive attention in addressing the explosively increasing data-processing issue in the post-Moore era. However, the tremendous size difference between basic electronic and photonic units poses challenges for the further deep convergence of optoelectronic microprocessors. Here, we report a floating-gate transistor fabricated with complementary metal-oxide-semiconductor compatible technologies, which can realize multilevel photoelectric logic computing and in situ memory simultaneously. The transistor presents stepped floating gates of perovskite quantum dots with different bandgaps and exhibits nonvolatile multilevel memory states written/erased by electrical and high-bandwidth optical signals. Meanwhile, the device can also realize logic functions such as an optoelectronic AND gate by separably programming the states of the stepped floating gates with bias and optical wavelength. A convergence of multilevel logic computing and storage is further achieved on the transistor. By demonstrating such multifunctionality in a single device, the photoelectric transistors, even with a rather large size to match photonic cells, can provide the optoelectronic microprocessors with substantially improved performances.

Keywords: CMOS compatibility; in situ multilevel memory; perovskite quantum dots; photoelectric logic transistors; stepped floating gates.