First demonstration of robust tri-gate β-Ga2O3nano-membrane field-effect transistors

Hagyoul Bae; Tae Joon Park; Jinhyun Noh; Wonil Chung; Mengwei Si; Shriram Ramanathan; Peide D Ye

doi:10.1088/1361-6528/ac3f11

First demonstration of robust tri-gate β-Ga₂O₃nano-membrane field-effect transistors

Nanotechnology. 2021 Dec 24;33(12). doi: 10.1088/1361-6528/ac3f11.

Authors

Hagyoul Bae^{1

2}, Tae Joon Park³, Jinhyun Noh^{1

2}, Wonil Chung^{1

2}, Mengwei Si⁴, Shriram Ramanathan³, Peide D Ye^{1

2}

Affiliations

¹ Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907, United States of America.
² Birck Nanotechnology Center, Purdue University, West Lafayette, IN 47907, United States of America.
³ Materials Engineering, Purdue University, West Lafayette, IN 47907, United States of America.
⁴ Electronic Engineering, Shanghai Jiao Tong University, Shanghai 200240, People's Republic of China.

PMID: 34852337
DOI: 10.1088/1361-6528/ac3f11

Abstract

Nano-membrane tri-gateβ-gallium oxide (β-Ga₂O₃) field-effect transistors (FETs) on SiO₂/Si substrate fabricated via exfoliation have been demonstrated for the first time. By employing electron beam lithography, the minimum-sized features can be defined with the footprint channel width of 50 nm. For high-quality interface betweenβ-Ga₂O₃and gate dielectric, atomic layer-deposited 15 nm thick aluminum oxide (Al₂O₃) was utilized with tri-methyl-aluminum (TMA) self-cleaning surface treatment. The fabricated devices demonstrate extremely low subthreshold slope (SS) of 61 mV dec^-1, high drain current (I_DS) ON/OFF ratio of 1.5 × 10⁹, and negligible transfer characteristic hysteresis. We also experimentally demonstrated robustness of these devices with current-voltage (I-V) characteristics measured at temperatures up to 400 °C.

Keywords: atomic layer deposition; exfoliation; multi-channel; single-channel; tri-gate; wide bandgap; β-Ga2O3 FETs.