When thickness-dependent carrier mobility is coupled with Thomas-Fermi screening and interlayer resistance effects in two-dimensional (2D) multilayer materials, a conducting channel migrates from the bottom surface to the top surface under electrostatic bias conditions. However, various factors including (i) insufficient carrier density, (ii) atomically thin material thickness, and (iii) numerous oxide traps/defects considerably limit our deep understanding of the carrier transport mechanism in 2D multilayer materials. Herein, we report the restricted conducting channel migration in 2D multilayer ReS2 after a constant voltage stress of gate dielectrics is applied. At a given gate bias condition, a gradual increase in the drain bias enables a sensitive change in the interlayer resistance of ReS2, leading to a modification of the shape of the transconductance curves, and consequently, demonstrates the conducting channel migration along the thickness of ReS2 before the stress. Meanwhile, this distinct conduction feature disappears after stress, indicating the formation of additional oxide trap sites inside the gate dielectrics that degrade the carrier mobility and eventually restrict the channel migration. Our theoretical and experimental study based on the resistor network model and Thomas-Fermi charge screening theory provides further insights into the origins of channel migration and restriction in 2D multilayer devices.
Keywords: carrier mobility; carrier transport; multilayer; oxide defect; rhenium disulfide.