We optimized the p-side emission device configuration of photonic-crystal surface-emitting laser (PCSEL) to facilitate the easier chip process and wafer level testing as well as the feasibility of lasing at shorter wavelength. Typically, in order to obtain uniformly distributed current for larger emission area of PCSELs, laser output is designed through the n-side window due to the low hole mobility and thin p-side cladding layer. However, the substrate as well as the epi-layers have to be isolated before the test of each single die on the wafer, which compromised the advantage of wafer-level test of surface emitters. On the other hand, for lasers with emission photon energy higher than the bandgap energy of GaAs substrate, the power will be entirely attenuated. In this study, the optimized p-side emission by applying the transparent conduction layer on top of the p side contact layer to enhance the current distribution and breaking the symmetry of conventional circle pattern in a unit cell to boost the output efficiency is investigated. Through this approach, a high efficiency p-side up PCSEL platform with lower fabrication cost is developed, which is also applicable for short wavelength PCSELs.