Here, we demonstrate a side-gated in-plane structure of solution-processed amorphous oxide semiconductor ionotronic devices and logic circuits enabled by ion gel gate dielectrics with a monolithically integrated nanoscale passivation architecture. The large capacitance of the electric double layer (EDL) in the ion gel allows a device structure to be a side gate geometry, forming an in-plane structured amorphous In-Ga-Zn-O (a-IGZO) ionotronic transistor, which can be translated into a simplified logic gate configuration with a low operation voltage. Particularly, the monolithic passivation of the coplanar electrodes offers advantages over conventional inhomogeneous passivation, mitigating unintentional parasitic leakage current through the ion gel dielectric layer. More importantly, the monolithically integrated passivation over electrodes was readily obtained with a complementary metal-oxide semiconductor-compatible photochemical process by employing a controlled ultraviolet light manipulation under ozone ambient, which introduced not only much enhanced electrical characteristics but also a scalable device architecture. We investigated various electrical behaviors of the side-gated a-IGZO ionotronic transistor based on EDL, which is called an electric double layer transistor (EDLT), and logic circuits enabled by photochemically realized monolithic aluminum oxide (AlOX) passivation comparing to the native or polymerized passivation layer, which reveals that the photoassisted AlOX secures high-performance a-IGZO EDLTs with a low off current (<5.23 × 10-8 A), high on/off ratio (>1.87 × 105), and exceptional high carrier mobility (>14.5 cm2 V-1 s-1). Owing to the significantly improved electrical characteristics, an inverter circuit was successfully achieved with broad operation voltages from an ultralow VDD of 1 mV to 1.5 V, showing a fully logical voltage transfer characteristic with a gain of more than 4 V V-1.
Keywords: amorphous oxide semiconductors; electric double layer (EDL); ion gel; monolithic passivation; side gate geometry; thin-film transistor.