On-Chip TaO x -Based Non-volatile Resistive Memory for in vitro Neurointerfaces

Maksim Zhuk; Sergei Zarubin; Igor Karateev; Yury Matveyev; Evgeny Gornev; Gennady Krasnikov; Dmitiry Negrov; Andrei Zenkevich

doi:10.3389/fnins.2020.00094

On-Chip TaO _x -Based Non-volatile Resistive Memory for in vitro Neurointerfaces

Front Neurosci. 2020 Feb 26:14:94. doi: 10.3389/fnins.2020.00094. eCollection 2020.

Authors

Maksim Zhuk¹, Sergei Zarubin¹, Igor Karateev², Yury Matveyev³, Evgeny Gornev⁴, Gennady Krasnikov⁴, Dmitiry Negrov⁵, Andrei Zenkevich¹

Affiliations

¹ Laboratory of Functional Materials and Devices for Nanoelectronics, Moscow Institute of Physics and Technology, Moscow, Russia.
² National Research Center, Kurchatov Institute, Moscow, Russia.
³ Deutsches Elektronen-Synchrotron, Hamburg, Germany.
⁴ Molecular Electronics Research Institute (MERI), Moscow, Russia.
⁵ Laboratory of Neurocomputing Systems, Moscow Institute of Physics and Technology, Moscow, Russia.

Abstract

The development of highly integrated electrophysiological devices working in direct contact with living neuron tissue opens new exciting prospects in the fields of neurophysiology and medicine, but imposes tight requirements on the power dissipated by electronics. On-chip preprocessing of neuronal signals can substantially decrease the power dissipated by external data interfaces, and the addition of embedded non-volatile memory would significantly improve the performance of a co-processor in real-time processing of the incoming information stream from the neuron tissue. Here, we evaluate the parameters of TaO _x -based resistive switching (RS) memory devices produced by magnetron sputtering technique and integrated with the 180-nm CMOS field-effect transistors as possible candidates for on-chip memory in the hybrid neurointerface under development. The electrical parameters of the optimized one-transistor-one-resistor (1T-1R) devices, such as the switching voltage (approx. ±1 V), uniformity of the R _off/R _on ratio (∼10), read/write speed (<40 ns), and the number of the writing cycles (up to 10¹⁰), are satisfactory. The energy values for writing and reading out a bit ∼30 and ∼0.1 pJ, respectively, are also suitable for the desired in vitro neurointerfaces, but are still far too high once the prospective in vivo applications are considered. Challenges arising in the course of the prospective fabrication of the proposed TaO _x -based RS devices in the back-end-of-line process are identified.

Keywords: 1T-1R device; back-end-of-line process; high-density microelectrode arrays; in vitro neurointerfaces; neural tissue; non-volatile memory; resistive switching; tantalum oxide.