A low latency and low power indirect topology for on-chip communication

Usman Ali Gulzari; Sarzamin Khan; Muhammad Sajid; Sheraz Anjum; Frank Sill Torres; Hessam Sarjoughian; Abdullah Gani

doi:10.1371/journal.pone.0222759

A low latency and low power indirect topology for on-chip communication

PLoS One. 2019 Oct 2;14(10):e0222759. doi: 10.1371/journal.pone.0222759. eCollection 2019.

Authors

Usman Ali Gulzari¹, Sarzamin Khan², Muhammad Sajid³, Sheraz Anjum⁴, Frank Sill Torres⁵, Hessam Sarjoughian⁶, Abdullah Gani⁷

Affiliations

¹ Department of Electrical Engineering, The University of Lahore, Islamabad, Pakistan.
² Department of Electrical Engineering, COMSATS University Islamabad, Wah Campus, Wah Cantt, Pakistan.
³ Department of Electrical and Computer Engineering, University of Western Ontario, London, Ontario, Canada.
⁴ Department of Computer Science, COMSATS University, Islamabad, Wah Campus, Wah Cantt, Pakistan.
⁵ German Aerospace Center, Institute for the Protection of Maritime Infrastructures, Bremerhaven, Germany.
⁶ Arizona Center for Integrative Modeling & Simulation, Arizona State University, Tempe, United States of America.
⁷ Faculty of Computing and Informatics, Universiti Malaysia Sabah, International Campus Labuan, WP Labuan, Malaysia.

Abstract

This paper presents the Hybrid Scalable-Minimized-Butterfly-Fat-Tree (H-SMBFT) topology for on-chip communication. Main aspects of this work are the description of the architectural design and the characteristics as well as a comparative analysis against two established indirect topologies namely Butterfly-Fat-Tree (BFT) and Scalable-Minimized-Butterfly-Fat-Tree (SMBFT). Simulation results demonstrate that the proposed topology outperforms its predecessors in terms of performance, area and power dissipation. Specifically, it improves the link interconnectivity between routing levels, such that the number of required links isreduced. This results into reduced router complexity and shortened routing paths between any pair of communicating nodes in the network. Moreover, simulation results under synthetic as well as real-world embedded applications workloads reveal that H-SMBFT can reduce the average latency by up-to35.63% and 17.36% compared to BFT and SMBFT, respectively. In addition, the power dissipation of the network can be reduced by up-to33.82% and 19.45%, while energy consumption can be improved byup-to32.91% and 16.83% compared to BFT and SMBFT, respectively.

Publication types

Research Support, Non-U.S. Gov't

MeSH terms

Algorithms*
Computer Communication Networks*
Computer Simulation
Electric Power Supplies*

Grants and funding

This work was supported by the Fakulti Komputer dan Informatik Universiti Malaysia Sabah Kampus Antarabangsa Labuan Jalan Sungai Pagar 87000 W. P Labuan. The funder had no role in study design, data collection and analysis, decision to publish, or preparation of the manuscript.