We are living in the world of handheld smart devices including smart phones, mini computers, tablets, net-books and others communication devices. The telecommunication standards used in these devices includes error correction codes which are integral part of current and future communication systems. To achieve the higher data rate applications, the turbo and Low Density Parity Check (LDPC) codes are decoded on parallel architecture which in turn raises the memory conflict issue. In order to get the good performance, the simultaneous access to the entire memory bank should be performed without any conflict. In this article we present breadth first technique applied on transportation modeling of the problem for solving the collision issue of Turbo decoders in order to get optimized architecture solution.