Effect of Interface Traps on the Device Performance of InGaAs-Based Gate-All-Around Tunneling Field-Effect Transistors

Won Douk Jang; Young Jun Yoon; Min Su Cho; Bo Gyeong Kim; D In Man Kang

doi:10.1166/jnn.2019.17009

Effect of Interface Traps on the Device Performance of InGaAs-Based Gate-All-Around Tunneling Field-Effect Transistors

J Nanosci Nanotechnol. 2019 Oct 1;19(10):6036-6042. doi: 10.1166/jnn.2019.17009.

Authors

Won Douk Jang¹, Young Jun Yoon¹, Min Su Cho¹, Bo Gyeong Kim¹, D In Man Kang¹

Affiliation

¹ School of Electronics Engineering Kyungpook National University, Daegu 41566, Republic of Korea.

PMID: 31026904
DOI: 10.1166/jnn.2019.17009

Abstract

The effect of interface traps on InGaAs-based vertical gate-all-around (GAA) tunneling field-effect transistors (TFETs) has been investigated using technology computer-aided design (TCAD) simulation. The interface traps distributed within different energy levels (E^t) in the energy bandgap of a semiconductor material exhibit various influences on the device performances. In this work, InGaAs-based TFETs are simulated to analyze the effects on the on-state current (I_on), off-state current (I_off), threshold voltage (V_th), subthreshold swing (SS), and the ambipolar characteristics according to E^t and type of the interface traps. We have confirmed that I_off and SS are degraded by the interface traps. Further, it can be shown that I_on is mainly affected by the acceptor-like traps and ambipolar behavior is affected by the donor-like traps. All the effects increase as E^t becomes closer to the midgap. The effects of the interface traps with gate underlap and overlap at the source-channel region also have been investigated, considering the device fabrication. Additionally, the analysis of the effect of junction trap created at the source-channel junction has been performed.