Parylene-Based Double-Layer Gate Dielectrics for Organic Field-Effect Transistors

ACS Appl Mater Interfaces. 2018 Nov 7;10(44):37767-37772. doi: 10.1021/acsami.8b12663. Epub 2018 Oct 26.

Abstract

We demonstrate high-performance and stable organic field-effect transistors (OFETs) using parylene-based double-layer gate dielectrics (DLGDs). DLGDs, consisting of parylene C as the upper layer and F as the lower layer, are designed to simultaneously provide good interface and bulk gate dielectric properties by exploiting the advantages of each gate dielectric. The structural effects of DLGDs are systematically investigated by evaluating the electrical characteristics and dielectric properties while varying the thickness ratio of each gate dielectric. The OFET with the optimized DLGD exhibits high performance and operational stability. This systematic approach will be useful for realizing practical electronic applications.

Keywords: bias stress; double-layer gate dielectrics; organic field-effect transistors; parylene; stability.