This paper describes a new, low-cost, top-down fabrication process, which makes it possible to define nanowire field effect transistor arrays with different numbers of nanowires simultaneously and systematically comparing their electrical performance. The main feature of this process is a developed bilayer photoresist pattern with a retrograde profile, which enables the modification of the nanowire in width, length, height and the number of transistor channels. The approach is compatible with low-cost manufacture without electron beam lithography, and benefits from process temperatures below 190 °C. Process reliability has been investigated by scanning electron microscopy, transmission electron microscopy and atomic force microscopy. Electrical measurements demonstrate enhancement mode transistors, which show a scalable correlation between the number of nanowires and the electrical characteristics. Devices with 100 nanowires exhibit the best performance with a high field effect mobility of 11.0 cm2 Vs-1, on/off current ratio of 3.97 × 107 and subthreshold swing of 0.66 V dec-1.