We report the development of nanowire field-effect transistors featuring an ultrathin parylene film as a polymer gate insulator. The room temperature, gas-phase deposition of parylene is an attractive alternative to oxide insulators prepared at high temperatures using atomic layer deposition. We discuss our custom-built parylene deposition system, which is designed for reliable and controlled deposition of <100 nm thick parylene films on III-V nanowires standing vertically on a growth substrate or horizontally on a device substrate. The former case gives conformally coated nanowires, which we used to produce functional Ω-gate and gate-all-around structures. These give subthreshold swings as low as 140 mV/dec and on/off ratios exceeding 103 at room temperature. For the gate-all-around structure, we developed a novel fabrication strategy that overcomes some of the limitations with previous lateral wrap-gate nanowire transistors. Finally, we show that parylene can be deposited over chemically treated nanowire surfaces, a feature generally not possible with oxides produced by atomic layer deposition due to the surface "self-cleaning" effect. Our results highlight the potential for parylene as an alternative ultrathin insulator in nanoscale electronic devices more broadly, with potential applications extending into nanobioelectronics due to parylene's well-established biocompatible properties.
Keywords: Parylene; field-effect transistor; gate-all-around; nanowires; organic gate insulator.