Nonvolatile Electric Double-Layer Transistor Memory Devices Embedded with Au Nanoparticles

ACS Appl Mater Interfaces. 2018 Mar 21;10(11):9563-9570. doi: 10.1021/acsami.8b01902. Epub 2018 Mar 8.

Abstract

We present nonvolatile transistor memory devices that rely on the formation of electric double layer (EDL) at the semiconductor-electrolyte interface. The two critical functional components of the devices are the ion gel electrolyte and gold nanoparticles (NPs). The ion gel electrolyte contains ionic species for EDL formation that allow inducing charges in the semiconductor-electrolyte interface. The gold NPs inserted between the ion gel and the channel layer serve as trapping sites to the induced charges to store the electrical input signals. Two different types of gold NPs were used: one prepared using direct thermal evaporation and the other prepared using a colloidal process. The organic ligands attached onto the colloidal gold NPs prevented the escape of the trapped charges from the particles and thus enhanced the retention characteristics of the programmed/erased signals. The low-voltage-driven EDL formation resulted in a programmed/erased memory signal ratio larger than 103 from the nonvolatile indium-gallium-zinc oxide transistor memory devices at voltages below 10 V, which could be held for >105 s. The utility of the electrolytes to operate memory devices demonstrated herein should provide an alternative strategy to realize cheap, portable electronic devices powered with thin-film batteries.

Keywords: Au nanoparticles; electric double layer; ion gel; low-voltage operation; nonvolatile transistor memory device.