Thermal Conduction across Metal-Dielectric Sidewall Interfaces

Woosung Park; Takashi Kodama; Joonsuk Park; Jungwan Cho; Aditya Sood; Michael T Barako; Mehdi Asheghi; Kenneth E Goodson

doi:10.1021/acsami.7b06567

Thermal Conduction across Metal-Dielectric Sidewall Interfaces

ACS Appl Mater Interfaces. 2017 Sep 6;9(35):30100-30106. doi: 10.1021/acsami.7b06567. Epub 2017 Aug 22.

Authors

Woosung Park, Takashi Kodama¹, Joonsuk Park, Jungwan Cho², Aditya Sood, Michael T Barako³, Mehdi Asheghi, Kenneth E Goodson

Affiliations

¹ Department of Mechanical Engineering, University of Tokyo , 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan.
² Department of Mechanical Engineering, Kyung Hee University , 1732 Deogyoung-daero, Giheung-gu, Yongin-si, Gyeounggi-do 446-701, South Korea.
³ NG Next, Northrop Grumman Aerospace Systems , Redondo Beach, California 90278, United States.

PMID: 28786284
DOI: 10.1021/acsami.7b06567

Abstract

The heat flow at the interfaces of complex nanostructures is three-dimensional in part due to the nonplanarity of interfaces. One example common in nanosystems is the situation when a significant fraction of the interfacial area is composed of sidewalls that are perpendicular to the principal plane, for example, in metallization structures for complementary metal-oxide semiconductor transistors. It is often observed that such sidewall interfaces contain significantly higher levels of microstructural disorder, which impedes energy carrier transport and leads to effective increases in interfacial resistance. The impact of these sidewall interfaces needs to be explored in greater depth for practical device engineering, and a related problem is that appropriate characterization techniques are not available. Here, we develop a novel electrothermal method and an intricate microfabricated structure to extract the thermal resistance of a sidewall interface between aluminum and silicon dioxide using suspended nanograting structures. The thermal resistance of the sidewall interface is measured to be ∼16 ± 5 m² K GW^-1, which is twice as large as the equivalent horizontal planar interface comprising the same materials in the experimental sample. The rough sidewall interfaces are observed using transmission electron micrographs, which may be more extensive than at interfaces in the substrate plan in the same nanostructure. A model based on a two-dimensional sinusoidal surface estimates the impact of the roughness on thermal resistance to be ∼2 m² K GW^-1. The large disparity between the model predictions and the experiments is attributed to the incomplete contact at the Al-SiO₂ sidewall interfaces, inferred by observation of underetching of the silicon substrate below the sidewall opening. This study suggests that sidewall interfaces must be considered separately from planar interfaces in thermal analysis for nanostructured systems.

Keywords: electron−phonon coupling; incomplete contact; nonplanar interface; roughness; thermal boundary resistance.