Enhanced Giant Piezoresistance Performance of Sandwiched ZnS/Si/SiO2 Radial Heterostructure Nanotubes for Nonvolatile Stress Memory with Repeatable Writing and Erasing

ACS Appl Mater Interfaces. 2016 Dec 21;8(50):34648-34658. doi: 10.1021/acsami.6b10966. Epub 2016 Dec 12.

Abstract

It is a challenge to realize nonvolatile stress-writing memory. Herein, we propose a strategy to construct rewritable stress information storage devices, consisting of deliberately designing individual sandwiched ZnS/Si/SiO2 radial heterostructure nanotubes synthesized by one-step thermal evaporation method. A bulk trap-related Poole-Frenkel hopping mechanism is proposed. Carriers are localized in a narrow bandgap Si intermediate layer; moreover, incorporated impurities and heterointerface defects can serve as charge trap centers or storage mediators. Compressive strain can induce trap barrier height to decrease at relatively low operation bias voltage, whereas tensile strain can induce it to increase, resulting in a giant piezoresistance effect. After both loading compressive and tensile strains at low bias voltage, additionally, the emptying of trap states results in a high resistance state. However, the emptied trap states can be filled by applying a relatively high bias voltage without strains and, correspondingly, the memories return to low resistance state. The emptying and filling of trap states, respectively applied by strains and high electric field, result in a repeatable writing/erasing nonvolatile memory effect. The results indicate that the creation and modification of trap states in multiscale nanostructures can give an avenue to the development of novel nanodevices for rewritable nonvolatile stress sensor and memory.

Keywords: charge transport; data storage; flexible electronics; nanodevices; nanotubes.