A readout integrated circuit (ROIC) using two-step fastest signal identification (FSI) is proposed to reduce the number of input channels of a data acquisition (DAQ) block with a high-channel reduction ratio. The two-step FSI enables the proposed ROIC to filter out useless input signals that arise from scattering and electrical noise without using complex and bulky circuits. In addition, an asynchronous fastest signal identifier and a self-trimmed comparator are proposed to identify the fastest signal without using a high-frequency clock and to reduce misidentification, respectively. The channel reduction ratio of the proposed ROIC is 16:1 and can be extended to 16 × N:1 using N ROICs. To verify the performance of the two-step FSI, the proposed ROIC was implemented into a gamma photon detector module using a Geiger-mode avalanche photodiode with a lutetium-yttrium oxyorthosilicate array. The measured minimum detectable time is 1 ns. The difference of the measured energy and timing resolution between with and without the two-step FSI are 0.8% and 0.2 ns, respectively, which are negligibly small. These measurement results show that the proposed ROIC using the two-step FSI reduces the number of input channels of the DAQ block without sacrificing the performance of the positron emission tomography (PET) systems.
Keywords: GAPD; Geiger-mode avalanche photodiode; LYSO; PET; fastest signal identification; lutetium-yttrium oxyorthosilicate; positron emission tomography; readout IC.