Spatial charge distribution for biased semiconductors fundamentally differs from metals since they can allow inhomogeneous charge distributions due to penetration of the electric field, as observed in the classical Schottky junctions. Similarly, the electrostatics of the dielectric/semiconductor interface can lead to a carrier depletion or accumulation in the semiconductor side when under applied bias. In this study, we demonstrate that the inhomogeneous carrier accumulation in a moderately p-doped GaAs-dielectric interface can be tailored for tunable plasmonics by an external voltage. Solving Maxwell's equations in the doped GaAs-dielectric stack, we investigate the tunability of the surface plasmon and phonon polaritons' interaction via an external bias. The plasmonic mode analysis of such an interface reveals interesting dispersion curves for surface plasmon and phonon polariton interactions that are not possible in metals. We show that the plasmon dispersion curve can be engineered through an external bias using the inherent properties of the p-doped GaAs- dielectric interface.