Controllable Threshold Voltage in Organic Complementary Logic Circuits with an Electron-Trapping Polymer and Photoactive Gate Dielectric Layer

Toan Thanh Dao; Heisuke Sakai; Hai Thanh Nguyen; Kei Ohkubo; Shunichi Fukuzumi; Hideyuki Murata

doi:10.1021/acsami.6b03183

Controllable Threshold Voltage in Organic Complementary Logic Circuits with an Electron-Trapping Polymer and Photoactive Gate Dielectric Layer

ACS Appl Mater Interfaces. 2016 Jul 20;8(28):18249-55. doi: 10.1021/acsami.6b03183. Epub 2016 Jul 6.

Authors

Toan Thanh Dao¹, Heisuke Sakai², Hai Thanh Nguyen¹, Kei Ohkubo^{3

4}, Shunichi Fukuzumi^{4

5}, Hideyuki Murata²

Affiliations

¹ Faculty of Electrical-Electronic Engineering, University of Transport and Communications , No. 3, Cau Giay Street, Dong Da, Hanoi Vietnam.
² Japan Advanced Institute of Science and Technology , 1-1 Asahidai, Nomi, Ishikawa 923-1292, Japan.
³ Division of Applied Chemistry, Graduate School of Engineering, Osaka University , Suita, Osaka 565-0871, Japan.
⁴ Department of Chemistry and Nano Science, Ewha Womans University , Seoul 120-750, Korea.
⁵ Faculty of Science and Technology, Meijo University, SENTAN, Japan Science and Technology Agency (JST) , Nagoya, Aichi 468-8502, Japan.

PMID: 27348479
DOI: 10.1021/acsami.6b03183

Abstract

We present controllable and reliable complementary organic transistor circuits on a PET substrate using a photoactive dielectric layer of 6-[4'-(N,N-diphenylamino)phenyl]-3-ethoxycarbonylcoumarin (DPA-CM) doped into poly(methyl methacrylate) (PMMA) and an electron-trapping layer of poly(perfluoroalkenyl vinyl ether) (Cytop). Cu was used for a source/drain electrode in both the p-channel and n-channel transistors. The threshold voltage of the transistors and the inverting voltage of the circuits were reversibly controlled over a wide range under a program voltage of less than 10 V and under UV light irradiation. At a program voltage of -2 V, the inverting voltage of the circuits was tuned to be at nearly half of the supply voltage of the circuit. Consequently, an excellent balance between the high and low noise margins (NM) was produced (64% of NMH and 68% of NML), resulting in maximum noise immunity. Furthermore, the programmed circuits showed high stability, such as a retention time of over 10(5) s for the inverter switching voltage. Our findings bring about a flexible, simple way to obtain robust, high-performance organic circuits using a controllable complementary transistor inverter.

Keywords: CMOS; controllable threshold voltage; long retention time; low program voltage; organic complementary circuit; organic field-effect transistors.