Development of heteroepitaxy growth of catalyst-free vertical III-V nanowires on Si wafers is highly desirable for future nanoscale Si-based electronic and optoelectronic devices. In this study, a proof-of-concept approach is developed for catalyst-free heteroepitaxy growth of InAs nanowires on Si wafers. Before the growth of InAs nanowires, a Si-compatible metallic film with a thickness of several tens of nanometers was predeposited on a Si wafer and then annealed to form nanosize openings so as to obtain a metallic mask. These nano-openings exposed the surface of the Si wafer, which allowed subsequent nucleation and growth of epitaxial InAs nanowires directly on the surface of the Si wafer. The small size of the nano-openings limits the lateral growth of the nanostructures but promotes their axial growth. Through this approach, catalyst-free InAs nanowires were grown on both Si (111) and (001) wafers successfully at different growth temperatures. In particular, ultralong defect-free InAs nanowires with the wurtzite structure were grown the Si (111) wafers at 550 °C using the Ni mask. This study offers a simple, cost-effective, and scalable method to grow catalyst-free III-V nanowires on Si wafers. The simplicity of the approach opens a new avenue for the growth and integration of catalyst-free high-quality heteroepitaxial III-V nanowires on Si wafers.
Keywords: InAs nanowires; Si wafers; catalyst-free; heteroepitaxial; metallic mask.