Black phosphorus (BP) has emerged as a promising two-dimensional (2D) material for next generation transistor applications due to its superior carrier transport properties. Among other issues, achieving reduced subthreshold swing and enhanced hole mobility simultaneously remains a challenge which requires careful optimization of the BP/gate oxide interface. Here, we report the realization of high performance BP transistors integrated with HfO2 high-k gate dielectric using a low temperature CMOS process. The fabricated devices were shown to demonstrate a near ideal subthreshold swing (SS) of ~69 mV/dec and a room temperature hole mobility of exceeding >400 cm(2)/Vs. These figure-of-merits are benchmarked to be the best-of-its-kind, which outperform previously reported BP transistors realized on traditional SiO2 gate dielectric. X-ray photoelectron spectroscopy (XPS) analysis further reveals the evidence of a more chemically stable BP when formed on HfO2 high-k as opposed to SiO2, which gives rise to a better interface quality that accounts for the SS and hole mobility improvement. These results unveil the potential of black phosphorus as an emerging channel material for future nanoelectronic device applications.