Wafer-level hysteresis-free resonant carbon nanotube transistors

Ji Cao; Sebastian T Bartsch; Adrian M Ionescu

doi:10.1021/nn506817y

Wafer-level hysteresis-free resonant carbon nanotube transistors

ACS Nano. 2015 Mar 24;9(3):2836-42. doi: 10.1021/nn506817y. Epub 2015 Mar 12.

Authors

Ji Cao^{1

2}, Sebastian T Bartsch², Adrian M Ionescu²

Affiliations

¹ †Nanoelectronics Lab, Stanford University, Stanford, California 94305, United States.
² ‡Nanoelectronic Devices Laboratory, Ecole Polytechnique Fédérale de Lausanne (EPFL), Lausanne 1015, Switzerland.

PMID: 25752991
DOI: 10.1021/nn506817y

Abstract

We report wafer-level fabrication of resonant-body carbon nanotube (CNT) field-effect transistors (FETs) in a dual-gate configuration. An integration density of >10(6) CNTFETs/cm(2), an assembly yield of >80%, and nanoprecision have been simultaneously obtained. Through combined chemical and thermal treatments, hysteresis-free (in vacuum) suspended-body CNTFETs have been demonstrated. Electrostatic actuation by lateral gate and FET-based readout of mechanical resonance have been achieved at room temperature. Both upward and downward in situ frequency tuning has been experimentally demonstrated in the dual-gate architecture. The minuscule mass, high resonance frequency, and in situ tunability of the resonant CNTFETs offer promising features for applications in radio frequency signal processing and ultrasensitive sensing.

Keywords: carbon nanotube; field-effect transistors; hysteresis-free; in situ tuning; nanoprecision; resonators; wafer-scale fabrication.

Publication types

Research Support, Non-U.S. Gov't