Multilevel resistive switching in planar graphene/SiO2 nanogap structures

ACS Nano. 2012 May 22;6(5):4214-21. doi: 10.1021/nn300735s. Epub 2012 Apr 27.

Abstract

We report a planar graphene/SiO(2) nanogap structure for multilevel resistive switching. Nanosized gaps created on a SiO(2) substrate by electrical breakdown of nanographene electrodes were used as channels for resistive switching. Two-terminal devices exhibited excellent memory characteristics with good endurance up to 10(4) cycles, long retention time more than 10(5) s, and fast switching speed down to 500 ns. At least five conduction states with reliability and reproducibility were demonstrated in these memory devices. The mechanism of the resistance switching effect was attributed to a reversible thermal-assisted reduction and oxidation process that occurred at the breakdown region of the SiO(2) substrate. In addition, the uniform and wafer-size nanographene films with controlled layer thickness and electrical resistivity were grown directly on SiO(2) substrates for scalable device fabrications, making it attractive for developing high-density and low-cost nonvolatile memories.