Nanostructured silicon (na-Si:H) thin films were fabricated using plasma enhanced chemical vapour deposition (PECVD) technique under high silane hydrogen dilution and a discharge frequency of 27 MHz, where the substrate was located in the dark region of the plasma, protected by a grounded metal grid. By not exposing the growth surface directly to the plasma we avoid the silicon growth surface to sustain a high ion bombardment leading to a less defective surface and highly compact films. The intrinsic films grown under these conditions were used to produce the channel region of thin film transistors (TFTs) with a bottom gate staggered configuration, integrating different dielectric layers. The devices produced exhibit a field effect mobility close to 1.84 cm2 V(-1) s(-1), threshold voltage around 2 V, on/off ratio above 10(7) and sub-threshold slope below 0.5 V/decade, depending on the dielectric used.