The sub-micron damascene interconnects, electromigration is mainly due to the diffusion at the interfaces of Cu with liner or dielectric capping layer. Many reports have shown that Cu/capping dielectric is the dominant interface. Experiments were performed to study the effect of the interfacial conditions of Cu/capping dielectric material on electromigration for narrow and wide Cu lines. The results revealed significant differences in electromigration behavior of via-fed upper and lower layer damascene test structures. For upper layer test structure, the capping layer and plasma surface treatment significantly dominated EM performance for different line width structures. In the case of lower layer test structure, the electromigration time to failure was found to be influenced by the capping layer and via process, and it remained unaffected by the plasma surface treatment for the narrow Cu line. For the wide line width (3X), electromigration performance was influenced by the current crowding on via-bottom.