This article presents an electrocardiogram (ECG) delineation and arrhythmia heartbeat detection system using a novel second-order level-crossing sampling analog to digital converter (ADC) for real-time data compression and feature extraction. The proposed system consists of the front-end integrated circuit of the data converter, the delineation algorithm, and the arrhythmia detection algorithm. Compared with conventional level-sampling ADCs, the proposed circuit updates tracking thresholds using linear extrapolation, which forms a second-order level-crossing sampling ADC that has sloped sampling levels. The computing is done digitally and is implemented by modifying the digital control logic of a conventional Successive-approximation-register (SAR) ADC. The system separates the sampling and quantization processes and only selects the turning points in the input waveform for quantization. The output of the proposed data converter consists of both the digital value of the selected sampling points and the timestamp between the selected sampling points. The main advantages are data savings for the data converter and the following digital signal processing or communication circuits, which are ideal for low-power sensors. The test chip was fabricated using a 180 nm CMOS process. When sensing sparse signals such as ECG signals the proposed ADC achieves a compression factor of 8.33. The delineation algorithm uses a triangle filter method to locate the fiducial points and measures the intervals, slopes, and morphology of the QRS complex and the P/T waves. Those extracted features are then used in the arrhythmia heartbeat detection algorithm to identify Premature Ventricular Contraction (PVC). The overall performance of the system is evaluated using the MIT-BIH database and the QT database, which is also compared with the recently reported systems. The accuracy, sensitivity, specificity, PPV, and F1 score are 97.3%, 89.6%, 97.8%, 73.3%, and 0.81 for detecting PVC.