A Survey of MPSoC Management toward Self-Awareness

Micromachines (Basel). 2024 Apr 26;15(5):577. doi: 10.3390/mi15050577.

Abstract

Managing Multi-Processor Systems-on-Chip (MPSoCs) is becoming increasingly complex as demands for advanced capabilities rise. This complexity is due to the involvement of more processing elements and resources, leading to a higher degree of heterogeneity throughout the system. Over time, management schemes have evolved from simple to autonomous systems with continuous control and monitoring of various parameters such as power distribution, thermal events, fault tolerance, and system security. Autonomous management integrates self-awareness into the system, making it aware of its environment, behavior, and objectives. Self-Aware Cyber-Physical Systems-on-Chip (SA-CPSoCs) have emerged as a concept to achieve highly autonomous management. Communication infrastructure is also vital to SoCs, and Software-Defined Networks-on-Chip (SDNoCs) can serve as a base structure for self-aware systems-on-chip. This paper presents a survey of the evolution of MPSoC management over the last two decades, categorizing research works according to their objectives and improvements. It also discusses the characteristics and properties of SA-CPSoCs and explains why SDNoCs are crucial for these systems.

Keywords: MPSoC management; multi-processor system-on-chip; self-aware cyber-physical systems-on-chip; self-awareness; software-defined networks-on-chip; survey.

Grants and funding

This research was supported by the National Council for the Humanities, Sciences and Technology (Consejo Nacional de Humanidades Ciencias y Tecnologias—CONAHCYT) through CVU numbers 611184, 595403 and 505017.