Parallel fixed point implementation of a radial basis function network in an FPGA

Alisson C D de Souza; Marcelo A C Fernandes

doi:10.3390/s141018223

Parallel fixed point implementation of a radial basis function network in an FPGA

Sensors (Basel). 2014 Sep 29;14(10):18223-43. doi: 10.3390/s141018223.

Authors

Alisson C D de Souza¹, Marcelo A C Fernandes²

Affiliations

¹ Department of Computer Engineering and Automation, Center of Technology, Federal University of Rio Grande do Norte-UFRN, Natal 59078-970, Brazil. alisson.camara@gmail.com.
² Department of Computer Engineering and Automation, Center of Technology, Federal University of Rio Grande do Norte-UFRN, Natal 59078-970, Brazil. mfernandes@dca.ufrn.br.

Abstract

This paper proposes a parallel fixed point radial basis function (RBF) artificial neural network (ANN), implemented in a field programmable gate array (FPGA) trained online with a least mean square (LMS) algorithm. The processing time and occupied area were analyzed for various fixed point formats. The problems of precision of the ANN response for nonlinear classification using the XOR gate and interpolation using the sine function were also analyzed in a hardware implementation. The entire project was developed using the System Generator platform (Xilinx), with a Virtex-6 xc6vcx240t-1ff1156 as the target FPGA.