Search Page
Save citations to file
Email citations
Send citations to clipboard
Add to Collections
Add to My Bibliography
Create a file for external citation management software
Your saved search
Your RSS Feed
Search Results
2 results
Filters applied: . Clear all
Results are displayed in a computed author sort order.
The Results By Year timeline is not available.
Page 1
OpenVVC Decoder Parameterized and Interfaced Synchronous Dataflow (PiSDF) Model: Tile Based Parallelism.
J Signal Process Syst. 2022 Oct 14:1-13. doi: 10.1007/s11265-022-01819-7. Online ahead of print.
J Signal Process Syst. 2022.
PMID: 36268535
Free PMC article.
A high-performance two-dimensional transform architecture of variable block sizes for the VVC standard.
Ben Jdidia S, Belghith F, Masmoudi N.
Ben Jdidia S, et al. Among authors: belghith f.
J Real Time Image Process. 2022;19(6):1081-1090. doi: 10.1007/s11554-022-01250-y. Epub 2022 Sep 1.
J Real Time Image Process. 2022.
PMID: 36065274
Free PMC article.
Item in Clipboard
Cite
Cite