Thermal Compact Modeling and Resistive Switching Analysis in Titanium Oxide-Based Memristors

ACS Appl Electron Mater. 2024 Feb 15;6(2):1424-1433. doi: 10.1021/acsaelm.3c01727. eCollection 2024 Feb 27.

Abstract

Resistive switching devices based on the Au/Ti/TiO2/Au stack were developed. In addition to standard electrical characterization by means of I-V curves, scanning thermal microscopy was employed to localize the hot spots on the top device surface (linked to conductive nanofilaments, CNFs) and perform in-operando tracking of temperature in such spots. In this way, electrical and thermal responses can be simultaneously recorded and related to each other. In a complementary way, a model for device simulation (based on COMSOL Multiphysics) was implemented in order to link the measured temperature to simulated device temperature maps. The data obtained were employed to calculate the thermal resistance to be used in compact models, such as the Stanford model, for circuit simulation. The thermal resistance extraction technique presented in this work is based on electrical and thermal measurements instead of being indirectly supported by a single fitting of the electrical response (using just I-V curves), as usual. Besides, the set and reset voltages were calculated from the complete I-V curve resistive switching series through different automatic numerical methods to assess the device variability. The series resistance was also obtained from experimental measurements, whose value is also incorporated into a compact model enhanced version.