We propose and experimentally demonstrate a novel FPGA-based parallel architecture for delta-sigma modulation (DSM) for digital mobile fronthaul employing the DSM interface. This architecture breaks the limitations of the feedback loop in DSM, is not constrained by critical paths, and supports fully parallel processing, so it can deal with high sampling rates at low hardware operating speeds. In contrast to other parallel schemes, the proposed bit-by-bit quantization DSM avoid significant storage resources requirements for buffering. A real-time experimental system using Xilinx Kintex Ultrascale FPGA was implemented to validate the feasibility of the proposed architecture. 14 carrier aggregated orthogonal frequency division multiplexing (OFDM) signals are digitized by DSM into a 5Gb/s PAM4 signal and transmitted over a 20 km single-mode fiber (SMF). As a waveform-agnostic digitization interface, we also experimentally demonstrated the DSM with 14 carrier aggregated filter-bank-multicarrier (FBMC) signals, which can achieve better EVM performance.