Fabrication of a Field-Effect Transistor Based on 2D Novel Ternary Chalcogenide PdPS

ACS Appl Mater Interfaces. 2023 Sep 13;15(36):42891-42899. doi: 10.1021/acsami.3c09679. Epub 2023 Sep 1.

Abstract

Two-dimensional (2D) palladium phosphide sulfide (PdPS) has garnered significant attention, owing to its exotic physical properties originating from the distinct Cairo pentagonal tiling topology. Nevertheless, the properties of PdPS remain unexplored, especially for electronic devices. In this study, we introduce the thickness-dependent electrical characteristics of PdPS flakes into fabricated field-effect transistors (FETs). The broad thickness variation of the PdPS flakes, ranging from 0.7-306 nm, is prepared by mechanical exfoliation, utilizing large bulk crystals synthesized via chemical vapor transport. We evaluate this variation and confirm a high electron mobility of 14.4 cm2 V-1 s-1 and Ion/Ioff > 107. Furthermore, the 6.8 nm-thick PdPS FET demonstrates a negligible Schottky barrier height at the gold electrode contact, as evidenced by the measurement of the temperature-dependent transfer characteristics. Consequently, we adjusted the Fowler-Nordheim tunneling mechanism to elucidate the charge-transport mechanism, revealing a modulated mobility variation from 14.4 to 41.2 cm2 V-1 s-1 with an increase in the drain voltage from 1 to 5 V. The present findings can broaden the understanding of the unique properties of PdPS, highlighting its potential as a 2D ternary chalcogenide in future electronic device applications.

Keywords: 2D van der Waals material; Field-effect transistor; Fowler−Nordheim tunneling; PdPS; Schottky barrier height.