GaN/Si Heterojunction VDMOS with High Breakdown Voltage and Low Specific On-Resistance

Xin Yang; Baoxing Duan; Yintang Yang

doi:10.3390/mi14061166

GaN/Si Heterojunction VDMOS with High Breakdown Voltage and Low Specific On-Resistance

Micromachines (Basel). 2023 May 31;14(6):1166. doi: 10.3390/mi14061166.

Authors

Xin Yang¹, Baoxing Duan¹, Yintang Yang¹

Affiliation

¹ Key Laboratory of the Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices, School of Microelectronics, Xidian University, No. 2 South TaiBai Road, Xi'an 710071, China.

Abstract

A novel VDMOS with the GaN/Si heterojunction (GaN/Si VDMOS) is proposed in this letter to optimize the breakdown voltage (BV) and the specific on-resistance (R_on,sp) by Breakdown Point Transfer (BPT), which transfers the breakdown point from the high-electric-field region to the low-electric-field region and improves the BV compared with conventional Si VDMOS. The results of the TCAD simulation show that the optimized BV of the proposed GaN/Si VDMOS increases from 374 V to 2029 V compared with the conventional Si VDMOS with the same drift region length of 20 μm, and the R_on,sp of 17.2 mΩ·cm² is lower than 36.5 mΩ·cm² for the conventional Si VDMOS. Due to the introduction of the GaN/Si heterojunction, the breakdown point is transferred by BPT from the higher-electric-field region with the largest radius of curvature to the low-electric-field region. The interfacial state effects of the GaN/Si are analyzed to guide the fabrication of the GaN/Si heterojunction MOSFETs.

Keywords: MOSFETs; breakdown voltage; heterojunction; interface state; specific on-resistance.

Abstract

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